8-Bit Microcontrollers of the SGS-Thomson ST62T/Exx family

General Advice

This device features data storage using the EPROM and EEPROM technology.

Options

Program Memory

select or deselect this item to enable or disable the capability to program this OTP/EPROM memory.

Data EEPROM ( if available )

select or deselect this item to enable or disable the capability to program this EEPROM memory.

Softw. Protection ( available on ST62T/Exx devices )

select or deselect this item to enable or disable the Software Protection.

Option Byte ( available on ST62T/ExxB devices )

select or deselect this item to enable or disable the capability to program the Option Byte.

Option Word ( available on ST62T/ExxC devices )

select or deselect this item to enable or disable the capability to program the Option Word.

Program functions

Read

The Program Memory ( OTP/EPROM ) and Data EEPROM ( EEPROM ) will be read into the buffer memory, Software Protection/Option Byte/Option Word will be read and the options will be set accordingly.

Blank Check

With the exception of Data EEPROM's, an empty test will be conducted on the device

.Program

If the Program Memory option is selected - the OTP/EPROM will be programmed with the data from the buffer,
if the Data EEPROM option is selected - the EEPROM will be programmed with the data from the buffer,
if the Protection/Option Byte/Option Word option is selected - the Software Protection/Option Byte/Option Word will be programmed respectively.

Note: the PROTECT bit of the Option Byte/Option Word will be set as a last task after data is programmed and verified successfully

Compare

The Program Memory ( OTP/EPROM ) and Data EEPROM ( EEPROM ) will be compared with the data in the buffer, Software Protection/Option Byte/Option Word will be compared with in the `Options`-Dialog.

Memory mapping

You cannot change the `Bufferstart:`and `Epromstart:` fields - they will be always 0h, but will change automatically at any action according to the following table:

Option Byte/Option Word

ADC SYNCHRO When set, an A/D conversion is started upon WAIT instruction execution, in order to reduce supply noise. When this bit is low, an A/D conversion is started as soon as the STA bit of the A/D Converter Control Register is set.

DELAY This bit enables the selection of the delay internally generated after the internal reset (external pin, LVD, or watchdog activated) is released. When DELAY is low, the delay is 2048 cycles of the oscillator, it is of 32768 cycles when DELAY is high.

EXTCNTL External STOP MODE control. When EXTCNTL is high, STOP mode is available with watchdog active by setting NMI pin to one. When EXTCNTL is low, STOP mode is not available with the watchdog active.

LVD LVD RESET enable. When this bit is set, safe RESET is performed by the MCU when the supply voltage is too low. When this bit is cleared, only power-on reset or external RESET are active.

NMI PULL NMI Pull-Up. This bit must be set high to configure the NMI pin with a pull-up resistor. When it is low, no pull-up is provided.

OSC Oscillator selection. When this bit is low, the oscillator must be controlled by a quartz crystal, a ceramic resonator or an external frequency. When it is high, the oscillator must be controlled by an RC network, with only the resistor having to be externally provided.

OSGEN Oscillator Safe Guard. This bit must be set high to enable the Oscillator Safe Guard. When this bit is low, the OSG is disabled.

PB0-1 PULL When set this bit removes pull-up at reset on PB0-PB1 pins. When cleared PB0-PB1 pins have an internal pull-up resistor at reset.

PB2-3 PULL When set this bit removes pull-up at reset on PB2-PB3 pins. When cleared PB2-PB3 pins have an internal pull-up resistor at reset.

PORT PULL This bit must be set high to have pull-up input state at reset on the I/O port. When this bit is low, I/O ports are in input without pull-up (high impedance) state at reset.

PROTECT Readout Protection. This bit allows the protection of the software contents against piracy. When the bit PROTECT is set high, readout of the OTP contents is prevented by hardware.. When this bit is low, the user program can be read.

TIM PULL TIM Pull-Up. This bit must be set high to configure the TIMER pin with a pull-up resistor. When it is low, no pull-up is provided

UART FRAME When set, UART transmission and reception are based on a 11-bit frame. When cleared, a 10-bit frame is used.

WDACT This bit controls the watchdog activation. When it is high, hardware activation is selected. The software activation is selected when WDACT is low.

Note: the options in the `Options`-Dialog correspondent to the Option Byte/Option Word bits as follow.