General Advice

This device features data storage using the EPROM technology

The programmer will program the user`s code in the memory area 0 to 7FFH/FFFH and will program the configuration registers located in the memory area FCE0H to FD01H. These configuration registers serve to configure the chip`s modes of operation.

EPROM Mapping the user have access:

Address MemoryDefinition

0000H to 07FFHUser`s code for P87LPC762

or

0000H to 0FFFHUser`s code for P87LPC764

FCE0H to FCFFH32 bytes used as user`s data

FD00HUser Configuration Reg. #1 (UCFG1)

FD01HUser Configuration Reg. #2 (UCFG2)

USER CONFIGURATION REG. #1 (UCFG1) AT ADDRESS FD00H

Erased State : FFH

WDTE: WatchDog Timer Enable;

1 = (Erased) WDT enabled

0 = (Programmed) WDT disabled

RPD: Reset Pin Disable;

1(Erased) External Reset pin disabled (The internal power-on reset is enabled)

0 (Programmed) External Reset pin enabled

PRHI: Port Reset High;

1 = Enable ports to high during and after RESET

0 = Enable ports to low during and after RESET

BO2.5: Brown out at 2.5V;

1 = Enable brown out at 2.5V

0 = Enable brown out at 3.8V

CLKR: CLock Rate select;

1 = Enable the clock’s divide by 1 (6 clocks per machine cycle)

0 = Enable the clock’s divide by 2 (12 clocks per machine cycle)

Note: Items in the ‘Options’-Dialog correspond to the following bits:

selected- `1` (Enabled)
unselected- `0` (Disabled)

FOSC2 - FOSC0: Oscillator control bits;

	FOSC2	FOSC1	FOSC0
External clock input at pin X1	1	1	1
Internal RC clock; 6MHz +/- 25%	0	1	1
32KHz to 100KHz external Crystal/Resonator	0	1	0
100KHz to 4 MHz external Crystal/Resonator	0	0	1
4 MHz to 20 MHz external Crystal/Resonator	0	0	0

USER CONFIGURATION REG. #1 (UCFG2) AT ADDRESS FD01H

Erased State : FFH

SEC2 - SEC1: SECurity/Lock bits 2 1;

11 = Security bits unprogrammed; Programming and Verify allowed.

10 = Security bit 2 unprogrammed; 1 programmed; Programming disabled, Verify enabled.

00 = Both bits programmed; Programming and Verify disabled

Note: Items in the ‘Options’-Dialog correspond to the following bits:

selected- `0` (Enabled)
unselected- `1` (Disabled)

Options

User`s Code

select or deselect this item to enable or disable the Program/Verify operation in user`s code area.

User`s Data

select or deselect this item to enable or disable the Program/Verify operation in user`s data area.

The User`s Code and User`s Data items do not have any effect on Read/Blank Test operations, the areas corresponding to these options will always be read/tested.

Configurations- and Lock- bits

The status of both the Configuration- (UCFG1) bits and of the Lock- (UCFG2) bits is linked to their corresponding data in the buffer. If you change the status of these bits, the data in the buffer will also be changed ( and vice versa ).

Please keep in mind that after setting both lock bits a comparison may no longer be performed.

After programming automatically, the Galep-4 will then perform a comparison. It only programs the lock bits after these steps have been completed. You can therefore easily program the user`s code, user`s data, configurations, and the lock- bits in one pass.

Please Note Once you have changed the bits, the program will not prompt you whether you wish to save the new data, if you are closing the application ( or window ) – you are therefore required to save the data in a separate instruction.

Program functions

Read

Regardless of the options selected, the user`s code, user`s data, configuration, and lock-bits will be read into the buffer.

Blank Check

Regardless of the options selected, the user`s code, user`s data, configuration, and lock-bits will be tested.

Program

The user`s code area - if User`s Code options selected, the user`s data area - if User`s Data option selected, configurations- and lock-bits will be programmed from the buffer.

Compare

The user`s code area - if User`s Code options selected, the user`s data area - if User`s Data option selected, configurations- and lock-bits will be compared with in the buffer.